Lecture notes for ECE 518/418 Memory Circuit Design, Fall 2008

 

December 10 Final exam, starts at 6 PM

December 8 lec28_ece5418.pdf and lec28_ece5418_video review for the final, Schmitt triggers and input buffers

December 3 lec27_ece5418.pdf and lec27_ece5418_video clock and data recovery circuits

December 1 lec26_ece5418.pdf and lec26_ece5418_video answer project questions, charge-pump PLL design in CMOS

November 26 Thanksgiving break

November 24 Thanksgiving break

November 19 lec25_ece5418.pdf and lec25_ece5418_video VCOs and loop dynamics

November 17 lec24_ece5418.pdf and lec24_ece5418_video project questions, start digital phase-locked loops

November 12 Midterm test

November 10 lec23_ece5418.pdf and lec23_ece5418_video finish up sensing using DS modulation, review for the Midterm test

November 5 lec22_ece5418.pdf and lec22_ece5418_video project discussions, more sensing using DS modulation

November 3 lec21_ece5418.pdf and lec21_ece5418_video introduction to CMOS imagers

October 29 lec20_ece5418.pdf and lec20_ece5418_video more resistive memory sensing

October 27 lec19_ece5418.pdf and lec19_ece5418_video sensing resistive memory, resistive memory operation

October 22 lec18_ece5418.pdf and lec18_ece5418_video more sensing using DS modulation, sensing Flash and resistive memory

October 20 lec17_ece5418.pdf and lec17_ece5418_video Introduction to sensing using DS modulation

October 15 lec16_ece5418.pdf and lec16_ece5418_video Flash array sensing and programming

October 13 lec15_ece5418.pdf and lec15_ece5418_video more Flash memory cell operation

October 8 lec14_ece5418.pdf and lec14_ece5418_video SRAMs, introduction to Flash memory

October 6 lec13_ece5418.pdf and lec13_ece5418_video charge pumps

October 1 lec12_ece5418.pdf and lec12_ece5418_video finish DLLs

September 29 lec11_ece5418.pdf and lec11_ece5418_video even more DLLs

September 24 lec10_ece5418.pdf and lec10_ece5418_video continue with DLLs

September 22 lec9_ece5418.pdf and lec9_ece5418_video synchronous DRAMs, introduction to delay-locked loops (DLLs)

September 17 lec8_ece5418.pdf and lec8_ece5418_video review quiz, DRAM timing signals and operation

September 15 lec7_ece5418.pdf and lec7_ece5418_video row and column decoders, array I/O

September 10 lec6_ece5418.pdf and lec6_ece5418_video design of sense amplifiers

September 8 lec5_ece5418.pdf and lec5_ece5418_video simulations, layout, and running the tools

September 5 lec4_ece5418.pdf and lec4_ece5418_video Ioff, subthreshold slope, more I/O discussion, sense-amp design considerations

September 3 lec3_ece5418.pdf and lec3_ece5418_video continue with DRAM sensing and writing, I/O organization

August 27 lec2_ece5418.pdf and lec2_ece5418_video DRAM memory cell, sensing in DRAM, folded and open arrays

August 25 lec1_ece5418.pdf and lec1_ece5418_video course introduction, CMOS circuit design review

 

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