Homework assignments and Project Information for ECE 572/472 Power Electronics, Fall 2011
Homework guidelines are found here.
Course projects due Tuesday, November 8 – Suppose that you work at NanoMem, a company that makes memory chips. To move ahead of the competition and increase NanoMem’s market share, an aggressive approach to reduce chip power consumption is sought. It’s decided that the linear voltage regulators and charge pumps will be replaced on the memory chip by switching DC-DC converters. With this approach, however, the inductors used in these switchers is limited to 100 nH each since they will be packaged with the memory chip, either above or below the chip. To help with your design thicker oxide devices are available in NanoMem’s nanometer processes that behave like the devices found in the C5 process.
Your project is to design a DC-to-DC converter, using the thicker oxide devices, with an input voltage ranging from 2.5 to 3.5 V and an output voltage of 1.25 V that can supply up to 100 mA. For graduate students, those enrolled in ECE 572, also design a converter that generates 3.75 V that can supply up to 10 mA.
Your report should detail your design concerns and reasons for the design selections, simulations (using LTspice) showing performance with varying loads and input voltages, efficiency (important), and temperature performance. Make sure all top-level simulation files are done with a single icon and start with a “_” (e.g., _sim1.asc, _sim2.asc, etc.. Further make sure these top-level schematics contain notes and automatically plot results (*.plt) so that determining what is going on requires little effort by the grader (very important).
Email me a PDF of your report and your simulation design directory zipped up (e.g., myname_ECE_5472_project.rar) before the start of class on Tuesday, November 8.
Some of the building blocks in the design will be provided for you (e.g., the transistor design of a bandgap to generate the 1.25 V reference voltage, op-amp, ramp generator, comparator, etc.) in ece5472_f11.zip. Feel free to modify these blocks if needed for your design.
HW#12 due Tuesday, December 6: 1) use LTspice to verify the results of Ex. 3-10 and 2) then discuss how to measure the Power MOSFET capacitances Ciss, Crss, and Coss. Verify your discussions using the IRF1503 power MOSFET and LTspice simulations.
HW#11 due Thursday, November 10, 8.8
HW#10 due Tuesday, November 1, 8-1 and 8.3
HW#9 due Tuesday, October 11 – 9-10, 9-12, and 9-13, verify your answers with LTspice
HW#8 due Thursday, October 6 – 9-2, 9-5, 9-6, and 9-8, verify your answers with LTspice
HW#7 due Thursday, September 22 – 6-33, 6-35, 6-37, and 6-40, verity your answers with LTspice.
HW#6 due Tuesday, September 20 – 6-30 and 6-31, verify your answers with LTspice.
HW#5 due Thursday, September 15 – 6-23 and 6-25, verify your answers with LTspice.
HW#4 due Tuesday, September 13 – 6-16, 6-17, 6-19, and 6-20. Verify your answers to each of these problems using LTspice.
HW#3 due Tuesday, September 6 – 6-1, 6-4, and 6-5. Verify your answers to 6-4 and 6-5 using LTspice.
HW#2 due Thursday, September 1 – use LTspice to generate Figs. 2-2, 2.3, and 2-4 (use ideal switches). As always show your schematics as well as the simulation results. Book problems 2-2, 2-4, and 2-9.
HW#1 due Tuesday, August 30
1. Show how to determine the Fourier Series representation of the waveform seen in Fig. 1-5 but with the switch closed for T/4 instead of T/3. How do you use the Fourier Series to determine the DC value of the voltage waveform?
2. Using LTspice simulations determine the input capacitance and rise/fall times of an IRF1503S with its source grounded and its drain connected to a 100 ohm resistor to 10 V and a 1,000 pF capacitor to ground. A 0 to 10 V pulse at the gate of the MOSFET should be used in the simulations to turn the MOSFET on and off.
3. Show how to simulate the reverse recovery time of a diode using LTspice. Compare simulation results to hand calculations for an example you make.