Lecture notes and videos for EE 421 Digital Electronics and ECG 621 Digital Integrated Circuit Design, Fall 2023

  

December 11  final exam (comprehensive), 6 to 8 PM, open book and closed notes. (A practice exam is found here.)   

December 6 – lec27_ee421_ecg621.pdf and lec27_ee421_ecg621_video  review for the final  

December 4 – lec26_ee421_ecg621.pdf and lec26_ee421_ecg621_video – discuss projects, end class early

November 29 – lec25_ee421_ecg621.pdf and lec25_ee421_ecg621_video – answer project questions

November 27 – lec24_ee421_ecg621.pdf and lec24_ee421_ecg621_video – dyanmic logic, 1T1C memory cell, clocked CMOS

November 22 – lec23_ee421_ecg621.pdf and lec23_ee421_ecg621_video – delay calculation examples, ring oscillator design

November 20 – lec22_ee421_ecg621.pdf and lec22_ee421_ecg621_video – answer project questions, power and energy, PWM discussion 

November 15 – lec21_ee421_ecg621.pdf and lec21_ee421_ecg621_video – clocked circuits, setup and hold times, metastability      

November 13 no lecture, Veteran's day observed 

November 8  lec20_ee421_ecg621.pdf and lec20_ee421_ecg621_video – delay calculations and complex CMOS logic gate design

November 6  lec19_ee421_ecg621.pdf and lec19_ee421_ecg621_video – review some key topics and discuss course projects

November 1  lec18_ee421_ecg621.pdf and lec18_ee421_ecg621_video – continue with the CMOS inverter, static logic gates

October 30  lec17_ee421_ecg621.pdf and lec17_ee421_ecg621_video – examples, discuss inverter switching point  

October 25  lec16_ee421_ecg621.pdf and lec16_ee421_ecg621_video – pass and transmission gates, start the CMOS inverter  

October 23  lec15_ee421_ecg621.pdf and lec15_ee421_ecg621_video – start Ch. 10, models for digital design, Miller effect   

October 18  lec14_ee421_ecg621.pdf and lec14_ee421_ecg621_video – discuss course projects   

October 16  Midterm, open book and closed notes (practice_midterm)   

October 11  lec13_ee421_ecg621.pdf and lec13_ee421_ecg621_video – review for the midterm exam        

October 9  lec12_ee421_ecg621.pdf and lec12_ee421_ecg621_video – MOSFET in the triode and saturation region, on/off currents   

October 4  lec11_ee421_ecg621.pdf and lec11_ee421_ecg621_video – finish threshold voltage, body effect, subthreshold operation

October 2  lec10_ee421_ecg621.pdf and lec10_ee421_ecg621_video – strong inversion, depletion, accumulation, start threshold voltage 

September 27  lec9_ee421_ecg621.pdf and lec9_ee421_ecg621_video – hi-res resistors in C5, poly-poly capacitors, using unit elements

September 25  lec8_ee421_ecg621.pdf and lec8_ee421_ecg621_video – laying out wide MOSFETs, Cadence examples

September 20  lec7_ee421_ecg621.pdf and lec7_ee421_ecg621_video – layout of a MOSFET, the active and poly layers, substrate/well contacts   

September 18  lec6_ee421_ecg621.pdf and lec6_ee421_ecg621_video – delay through the metal layers, crosstalk and ground bounce  

September 13  lec5_ee421_ecg621.pdf and lec5_ee421_ecg621_video – the metal layers, layout out a bond pad, capacitance, vias 

September 11  lec4_ee421_ecg621.pdf and lec4_ee421_ecg621_video – RC delay through an n-well resistor, reverse recovery time of a forward biased diode  

September 6  lec3_ee421_ecg621.pdf and lec3_ee421_ecg621_video – layout of an n-well resistor, DRC and Extraction, introduce depletion capacitance  

September 4  Labor Day Recess   

August 30 – lec2_ee421_ecg621.pdf and lec2_ee421_ecg621_video – making a design directory in Cadence for the C5 process, start Ch. 2, The Well

August 28 – lec1_ee421_ecg621.pdf and lec1_ee421_ecg621_video – course introduction, setting up Cadence  
 
  

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